Integrated circuits include, for example, active devices such as field effect transistors partially formed in a semiconductor substrate and interconnected by wiring levels comprising wires formed in interlevel dielectric layers formed on the substrate. Conventional wiring levels are formed by depositing an interlevel dielectric layer, patterning a photoresist layer formed on the dielectric layer, etching trenches in the dielectric layer, removing the photoresist and filling the trenches with metal. This is an expensive and time-consuming process. Accordingly, there exists a need in the art to mitigate the deficiencies and limitations described hereinabove.